home > resume > undergrad > eecs270
Term Schedule
Intro Engr
Eng 100 Eng 101 T.C. 215 T.C. 496
EECS 210 EECS 211 EECS 212 EECS 230 EECS 270 EECS 280 EECS 311 EECS 320 EECS 330 EECS 401 EECS 451 EECS 452 EECS 461
Math & Sciences
Math 115 Math 116 Math 215 Math 216 Chem 125&130 Phys 140&141 Phys 240&241
HU & S.S.
JE 101&JE 102 RCNS 270 Hist 285 Hist 301
Eng 195 ME 424 P.A.T. 201 Phys 489 T.C. 450

EECS 270: Introduction to Logic Design

Completed: A

Binary and non-binary systems, Boolean algebra digital design techniques, logic gates, logic minimization, standard combinational circuits, sequential circuits, flip-fl ops, synthesis of synchronous sequential circuits, PLAs, ROMs, RAMs, arithmetic circuits, computer-aided design. Laboratory includes hard-ware design and CAD experiments using logic schematic editors and ABEL hardware language.

Spring 2001, Professor W. Becher, Lab GSI Joe Collins

This was a pretty easy class overall. I had taken most of the material previously at KC/TC. However, what made the class awesome was the lab which was based of a Xilinx FPGA evaluation board and software. I wish that at least one lab would be with 74xx series TTL logic chips, but it was ok. The sixth and seventh projects were to be done entirely using ABEL code due to the apparent complexity involved. The sixth project was a vending machine controller and the seventh project was a small 16 opcode microcomputer. Project six was the most fun because I chose to redo it using only pure gates instead of ABEL. My ABEL implementation utilized 45% of the CLBs on the FPGA which was the lowest utilization out of the class. However, after reworking the entire project in pure logic gates using a custom data path, I was able to drop the utilization first to 16% and then finally to 6%. The longer data path however resulted in a slight (3MHz) decrease in maximum clock frequency down to 26.6MHz. A top level schematic of the non-code binary implementation of lab six is shown below:

Top level schematic of non-code Lab 6
Click to Enlarge Image



Information provided on this page is a result of undergraduate studies at the University of Michigan. Material may be copyrighted by the University of Michigan, James Glettler, and/or the various co-authors noted in group projects. Finished assignments are offered only for reference.