Silicon Solar Cell Design & Testing

Micro/Nano Processing • Device Fabrication • I–V Characterization

Designed, fabricated, and tested silicon solar cells in a full device workflow: implantation, anneal, ARC deposition, lithography, metallization, and I–V characterization. Investigated layout optimization and diagnosed anomalous wafers.

Project Summary

This project focused on optimizing silicon solar cell layouts to maximize power output. The process included design, fabrication, and characterization using a complete cleanroom flow.

Key Variables Studied
  • Finger count (N)
  • Finger width (W)
  • Metal coverage fraction
  • ARC thickness & uniformity

Fabrication Process

1. Ion Implantation

Frontside As (n+), backside B (p+). Controlled doping profiles to form junctions and BSF.

2. Cleaning & Anneal

Piranha + RCA clean, then furnace anneal (~900°C, 1 hr).

3. ARC Deposition

70 nm SiNx deposited via PECVD for antireflection.

4. Lithography + BOE Etch

Opened contact windows in the ARC layer.

5. Metallization

Frontside Ti/Al deposition with patterned finger lines. Backside Ti/Al for full contact.

Testing & Characterization

Measured dark and light I–V curves under AM1.5 illumination (1000 W/m²). Extracted Rs, Rsh, IL, Voc, Isc, and efficiency. Calibrated light intensity using a reference cell.

Key Figures of Merit
  • Efficiency (η)
  • Short Circuit Current (Isc)
  • Open Circuit Voltage (Voc)
  • Fill Factor (FF)

Results & Insights

Gallery

Full project presentation — click through at your own pace

Future Improvements