Micro/Nano Processing • Device Fabrication • I–V Characterization
Designed, fabricated, and tested silicon solar cells in a full device workflow: implantation, anneal, ARC deposition, lithography, metallization, and I–V characterization. Investigated layout optimization and diagnosed anomalous wafers.
This project focused on optimizing silicon solar cell layouts to maximize power output. The process included design, fabrication, and characterization using a complete cleanroom flow.
Frontside As (n+), backside B (p+). Controlled doping profiles to form junctions and BSF.
Piranha + RCA clean, then furnace anneal (~900°C, 1 hr).
70 nm SiNx deposited via PECVD for antireflection.
Opened contact windows in the ARC layer.
Frontside Ti/Al deposition with patterned finger lines. Backside Ti/Al for full contact.
Measured dark and light I–V curves under AM1.5 illumination (1000 W/m²). Extracted Rs, Rsh, IL, Voc, Isc, and efficiency. Calibrated light intensity using a reference cell.