


Publications:

F. P. Calmon, M. Médard and L. Zeger,
“Lists that are smaller than their parts: A new approach
to secrecy,”
in preparation.

F. P. Calmon, M. Médard and M. Effros,
“Equivalent models for multiterminal channels,”
in Proc. IEEE Inf. Theory Workshop, . [ pdf ]
 F. P. Calmon and M. D. Yacoub, "MRCS: Selecting Maximal Ratio Combined Signals  A Practical Hybrid Diversity Combining Scheme, IEEE Transaction on Wireless Communications, vol.8, no. 7, pp. 34253429, July 2009. [ pdf ]

F. P. Calmon and M. D. Yacoub, "A General Exact Formulation for the Outage Probability in InterferenceLimited Systems," in 2008 IEEE Global Communications Conference (Globecom'08) . [ pdf ]
 R. V. Mello, F. P. Calmon, A. A. M. Medeiros and M. D. Yacoub, “An Improved Analytical Method for Dimensioning Wireless Multihop Networks Jointly Combining Interference and Traffic Effects”, in Proceedings of the XXVII Brazilian Telecommunications Symposium, Blumenau, Brazil, 2009. [ pdf ]
 F. P. Calmon and M. D. Yacoub, “A practical diversity combining scheme based on the selection of maximal ratio combined signals,” in Proceedings of the XXVI Brazilian Telecommunications Symposium, Rio de Janeiro, Brazil, 2008.
 F. P. Calmon and M. D. Yacoub, “Joint outage probability: An exact formulation for the outage problem in wireless systems,” in
Proceedings of the XXVI Brazilian Telecommunications Symposium, Rio de Janeiro, Brazil, 2008, accepted.
 F. P. Calmon, F. M. Costa, and A. C. A. Nascimento, “Design of a stream cipher based on cellular
automata (in Portuguese),” in Proceedings of the XXVI Brazilian Telecommunications Symposium, Rio de
Janeiro, Brazil, 2008.

F. P. Calmon, "A VLSI Prototype of a 32Bit RISC Processor," in Proceedings of the VI Microelectronics Students Forum (Chips on the Mountains), Sept. 2006, Ouro Preto, Brazil.

F. P. Calmon and F. M. Costa, "A VLSI Implementation of a Linear Cellular Automata Testbed," in Proceedings of the VI Microelectronics Students Forum (Chips on the Mountains), Sept. 2006, Ouro Preto, Brazil.

F. P. Calmon, "Reconfigurable Computer Architectures in CMOS Technology (in Portuguese)," in Anais do XII Congresso de IC da UnB e III Congresso de IC do DF, Brasilia, Brazil, 2006.

F. P. Calmon, "Design of a 32bit RISC Processor using VHDL (in Portuguese)," in Anais do XI Congresso de IC da UnB e II Congresso de IC do DF, Brasilia, Brazil, 2005.

