65nm Photonic Test Chip Photos

This is a photograph of a recent photonic test chip fabricated in a standard 65nm CMOS technology by our collaborators at MIT. The chip contains a variety of photonic devices including waveguides, modulators, filters, and photodetectors. All of these devices are fabricated without any modifications to a standard CMOS process flow, except for a final post-processing step to create an air gap under the waveguides for better optical confinement. Our current research is investigating the best way to leverage these devices in future manycore processors. For an example of some of the work we are doing see our HOTI'08 and NOCS'09 papers.

This closeup shows two different photonic devices based on silicon ring resonators. The diameter of each small ring sets which wavelength of light the ring will extract (or "drop") from the waveguide. For example, the stacked rings at the bottom of the micrograph will filter light coming in the input port so that only a single specific wavelength is directed to the drop output port while all other wavelengths continue to the through output port. The device at the top of the micrograph is a modulator; an electrical signal injects charge into the ring to change its resonant frequency and thus we can electrically control whether the light from the input port is directed to the drop output port or to the through output port. Each of the "ports" is really a vertical coupler which allows optical probes to be attached to the chip for testing.