I am a final-year graduate student in Electrical Engineering and Computer Science at the Massachusetts Institute of Technology. I am currently studying as a Graduate Exchange Scholar at the University of California, Berkeley where I am finishing my thesis research on vector-thread architectures with Professor Krste Asanović. I am also an active member of the new Parallel Computing Laboratory (ParLab) at UC Berkeley which is tackling parallel architecture and software for mobile platforms. I will be joining the Electrical and Computer Engineering Department at Cornell University in January 2010.

Research

 ( full publication list )

My primary research interest is in energy-efficient parallel computer architecture for both high-performance and embedded applications. I am also interested in parallel programming models, interconnection networks, vector processing, VLSI chip design methodologies, and the intersection between computer architecture and future technologies such as silicon photonics and synthetic biology. Building prototype systems is an integral part of my research, since this is one of the best ways to validate assumptions, gain intuition about physical design issues, and provide platforms for future software research.

Vector-Thread Architectures

Vector-threading (VT) is a new performance-efficient approach which combines the area and energy efficiency of vector architectures with the flexibility of multithreaded execution [ISCA'04, MICRO'04]. To help validate our initial ideas we designed and fabricated the Scale VT Processor, a prototype for embedded applications implemented in a TSMC 0.18um process [TODAES'08, CSAIL'07]. Scale includes a RISC control processor and a four-lane vector-thread unit that can execute 16 operations per cycle and supports up to 128 active threads. The 16 sq mm chip runs at 260 MHz while consuming 0.4-1.1 W across a range of kernels. My thesis is investigating single-lane VT units which significantly simplify manycore VT implementations; the Maven processor tiles these single-lane VT units to create a malleable array of vector-thread engines where lanes can be ganged together to form larger VT units [WSS'08]. Our initial research on VT was selected as an IEEE Micro Top Pick [IEEE-MICRO'04], and the Scale VT Processor was a DAC/ISSCC Student Design Contest Winner in 2007. Scale Die Photo (about this photo)

Silicon Photonic Chip-Level Networks

Although we can expect tens to hundreds of cores on a die in the next decade, corresponding increases in main memory bandwidth are also required to improve overall application performance. Projected electrical technologies are not predicted to supply sufficient bandwidth with reasonable power consumption and packaging cost. Our colleagues at MIT have been developing a novel monolithic silicon photonic technology which can potentially provide immense bandwidth density at low-energy and low-cost. We have recently investigated how to leverage this technology to implement manycore processor-to-DRAM networks [HOTI'08], and we have also explored techniques for implementing low-diameter non-blocking networks for global on-chip communication [NOCS'09]. Our original work was selected for publication in an IEEE Micro Special Issue [IEEE-MICRO'09]. Photonics Test Chip Devices (about this photo)

Synthetic Biology

Synthetic biology is a new field which studies how to build artificial biological systems for engineering applications using classic engineering techniques such as abstraction, modeling, simulation, incremental testing, and modular design. Our early research examined using zinc-finger and leucine-zipper protein domains to create scalable cellular logic technologies [NSC'04]. Currently, I am collaborating with researchers at UC Berkeley to extend some of my previous work on optimal algorithms for the assembly of standard biological parts [Personal-Memo'04]. I was a member of the MIT team in the very first summer iGEM competition where we attempted to build synchronized chemotactic oscillators [iGEM-Proposal'04, iGEM-Presentation'04], and during the summer I did some preliminary work on modeling a Lux/AiiA relaxation oscillator [Personal-Memo'04]. Active E.coli (about this photo)

Other Projects

In addition to my primary research, I have also had an opportunity to work on several other projects. While at the University of Cambridge, my research focused on automatic image processing for scanning electron microscopy. I presented my work at the SCANNING microscopy conference where I won the best student presentation award [SCANNING'01]. At MIT several of my graduate courses involved semester-long research projects:
  • MIT 6.371 - Procedural Generation of Standard-Cell Datapaths [report]
  • MIT 6.374 - Gate-Level Voltage Scaling Using Dual-Voltage Domino Logic [paper]
  • MIT 6.829 - pStore: A Secure Peer-to-Peer Backup System [paper]
  • MIT 6.836 - Kickbot: A Spherical Autonomous Robot [paper]
Currently I am involved with the Par Lab at UC Berkeley. I am an active member of the architecture group developing new manycore architectures which efficiently integrate hundreds of cores onto a single chip. I am also a reviewer for the patterns group which is writing new design patterns for parallel programming. 		Kickbot Control Board (about this photo)

Teaching

I have had several opportunities to be involved in teaching during my graduate career. Some of the most rewarding experiences have been mentoring younger students both at MIT and at UC Berkeley. I have co-supervised four undergraduate students and three masters students who were conducting research on datapath cell tiling, simulation trace visualization, the Scale memory system, and on-chip networks. I have also been a teaching assistant for two semesters, and I helped create a student-run month-long robotics course.

6.375 Complex Digital Systems

Teaching Assistant, 2005 & 2006
The first time this course was offered was in the Spring of 2005 by Professors Krste Asanović and Arvind. This brand new course taught methodologies for designing large digital ASICs using the Bluespec Hardware Description Language. I was responsible for assembling the CAD toolflow, designing the laboratory assignments, giving several tutorials, and mentoring students through an intensive semester-long design project. The second time this course was offered was in the Spring of 2006 by Professor Arvind. In addition to improving the infrastructure from the previous year, I had more input into the overall direction of the course and gave several lectures on ASIC physical design issues. Much of the teaching material and infrastructure I developed is still used by the course today. Some of the lectures I taught are listed below:
  • Verilog 1 - Fundamentals [slides]
  • Verilog 2 - Design Examples [slides]
  • CMOS Transistors, Gates, and Wires [slides]
  • Managing Physical Design Issues in ASIC Toolflows [slides]
MIT 6.275 Highlighted Post-Layout (about this photo)

6.186 Mobile Autonomous Systems Laboratory

Co-Director/Instructor, 2001-2005
In 2001, I was part of a small team of graduate students who created a for-credit robotics course called 6.186 Maslab taught during MIT's month-long independent activities period. The course challenges small teams of students to build autonomous, vision-based robots which then navigate an unknown playing field. We continued to improve and teach the course every year, and it grew to include over fifty students. I acted as a co-director and an instructor from 2001 until 2005. The course is completely run by students who are responsible for fundraising, teaching, mentoring, and technical development including custom software and hardware design. We structured the course to include a week-long selection of "mini-lectures" on the basics of software engineering, mechanical engineering, and robotics so that students from a wide variety of backgrounds could participate. The course is still offered today and it remains very popular with both undergraduate and graduate students. Some of the "mini-lectures" I taught are listed below:
  • Robotic Sensor Basics
  • C++ Development for Beginners
  • Mobile Robotic Control Systems [slides]
MIT 6.186 Robot (about this photo)

Education

Software

This is a list of some of the software packages I have developed to help with my research. Please feel free to email me with comments, suggestions, bug reports, or fixes. Unless otherwise indicated all software is distributed under a BSD license.