Dmitry Vasilyev





email: vasilyev@mit.edu



 "Without love, neither the physical nor the intellectual powers will develop naturally"
- Johann Heinrich Pestalozzi (1746 - 1827)

 


I have graduated from the Computational Prototyping Group at MIT Research Laboratory of Electronics.


I have two main (and equal) intentions in my life.
The first is to make the outside world more friendly and wise.
The second is my self-improvement.
I beleive that knowledge will make this world more mature and thoughtful.
Therefore I have a policy to make people know about some relevant parts of my life experience.
Maybe this will help them to avoid some mistakes! :)


In other words -
let's learn together!!

My research at MIT

- My Ph.D. thesis Theoretical and practical aspects of linear and nonlinear model order reduction techniques.

 

- I am the major contributor to new (and heavily under development) web page and wiki dedicated to my field of endeavor - model order reduction.

 

- My recent talk "Introduction to the Hankel -based model order reduction for linear systems" [ppt presentation] [pdf presentation]

 

- Selected publications:


[1] Dmitry Vasilyev, Michal Rewienski and Jacob White: A TBR-based trajectory piecewise-linear algorithm for generating accurate low-order models for nonlinear analog circuits and MEMS. DAC 2003: 490-495 [ppt presentation]

[2] Dmitry Vasilyev, Michal Rewienski and Jacob White: Perturbation analysis of TBR model reduction in application to trajectory-piecewise linear algorithm for MEMS structures, Proceedings of the 2004 Nanotechnology Conference, 2004, Volume 2, p.434-437 [ppt presentation]

[3] Dmitry Vasilyev and Jacob White: A more reliable reduction algorithm for behavioral model extraction,
ICCAD: Proc. IEEE/ACM Int. Conf. Computer-Aided Design, San Jose CA, Nov. 2005, pp.
813-820 [ppt presentation]

[4] Dmitry Vasilyev, Michal Rewienski and Jacob White: Macromodel Generation for BioMEMS Components Using a Stabilized Balanced Truncation Plus Trajectory Piecewise-Linear Approach, IEEE Trans. CAD, v. 25 issue 2, pp. 285-293 (2006)

[5] Zuochang Ye, Dmitry Vasilyev, Zhenhai Zhu, Joel R. Phillips: Sparse Implicit Projection (SIP) for Reduction of General Many-Terminal Networks, ICCAD: Proc. IEEE/ACM Int. Conf. Computer-Aided Design, San Jose CA Nov. pp.736-743, 2008


Personal stuff


mit Comments and questions to vasilyev@mit.edu